Traditional power/control MOSFETs (metal oxide semiconductor field effect transistors) are based on a dual trench technology including charge compensation trenches and a termination trench. The charge compensation trenches provide for proper operation of power MOSFETs located near trenches in both on and off states.
Heretofore, fabrication approaches of power MOSFETs based on the dual trench technology includes an increased shield oxide thickness in the termination trench over the oxide thickness in the charge compensation trenches. That is, separate operations are performed to obtain the proper thickness of the oxide layers in the termination trench and the charge compensation trenches. The fabrication approach is described generally, as follows. First, a deposition of the desired shield oxide for the termination trench is performed. This is followed by the deposition of doped poly-silicon to form the electrode in the termination trench. Second, the oxide is removed from the charge compensation trenches. Third, deposition of the desired shield oxide for the charge compensation trenches is performed. This is followed by the deposition of doped poly-silicon to form the electrodes of the charge compensation trenches.
A particular problem with traditional fabrication techniques for dual trench technology is the susceptibility of cracks in one or more of the charge compensation trenches. In particular, during the deposition of the first shield oxide to the required thickness for the termination trench, the charge compensation trenches are completely filled with oxide. This is due to their smaller dimensions. For illustration, PRIOR ART FIG. 1 shows a device 100 having a dual trench technology, including charge compensation trenches 110A and 110B, and a termination trench 120. A crack 130 is shown formed within charge compensation trench 110A.
Crack 130 is formed from further processing at elevated temperature while the charge compensation trenches are still filled with oxide. In particular, after poly-silicon is deposited into the termination trench and etched back below the semiconductor mesa, an oxide trench refill is performed to protect the poly-silicon in the termination trench. This oxide refill is performed at high temperature. Due to the mismatch in thermal expansion coefficient between silicon and oxide, the oxide filled charge compensation trenches are susceptible to cracking at the higher temperature during the oxide refill due to mechanical stresses. On the other hand, the poly-silicon filled termination trench is less susceptible to cracking. This is more pronounced for devices having deeper trenches.
Additionally, a further processing risk involves a nitride hard mask used to shield the termination trench during the removal of the oxide from the charge compensation trenches. The shielding ability of the nitride hard mask is negatively impacted due to any variation from design in prior process operations. For instance, the oxide within the trench may be etched away due to insufficient protection by the nitride hard mask.